Semiconductor memories—such as, for example, DRAM'S, SRAM'S, ROM'S, EPROM'S, EEPROM'S, Flash EEPROM'S, Ferroelectric RAM'S, MAGRAM'S and others—have played a vital role in many electronic systems. Their functions for data storage, code (instruction) storage, and data retrieval/access (Read/Write) continue to span a wide variety of applications. Usage of these memories in both stand alone/discrete memory product forms, as well as embedded forms such as, for example, memory integrated with other functions like logic, in a module or monolithic integrated circuit, continues to grow. Cost, operating power, bandwidth, latency, ease of use, the ability to support broad applications (balanced vs. imbalanced accesses), and nonvolatility are all desirable attributes in a wide range of applications.
In typical memory systems, memory is utilized and accessed by applications according to an address stride. An address stride may be defined as the memory address spacing between successive memory accesses and/or writes by hardware, firmware, or software operating on the memory system. The size of an address stride may vary depending upon many factors including, but not limited to, the complexity of an application, and/or the architecture of the system.
In systems with a single processor, there may be a need for only a single address stride due to the processor typically finishing with one application before beginning the next. In this manner an address stride may be used for each application without the need to vary the size of the address stride. But in multiple processor systems, two or more processors may, for example, attempt to access memory in parallel while running different applications. The ability to access and precharge the memory at different address strides for each of the processors, however, has been previously unavailable. This may lead to a decline in the desirable attributes mentioned previously.